1. Field of the Invention
The present invention generally relates to semiconductor devices, and particularly relates to a voltage pumping-up circuit and a substrate-voltage generating circuit used in semiconductor devices.
2. Description of the Related Art
Semiconductor devices generally need to generate internal voltages which are different from a power voltage VDD and a ground voltage VSS when the power voltage VDD and a ground voltage VSS are externally provided.
In semiconductor memory devices such as DRAMs, for example, the voltage VDD (HIGH) is stored in capacitors serving as memory cells. In this case, cell transistors connected to the memory cells are turned on in order to provide electric charge from bit lines to the memory cells via the cell transistors. In order to achieve high-speed electric charge of the memory cells, gates of the cell transistors need to receive a voltage level VDD+Vth+.alpha.. Here, the voltage level Vth is a threshold voltage level of the cell transistors. As can be understood, a voltage level higher than the voltage VDD by a margin of the threshold voltage level is necessary as the gate voltage in order to charge the memory cells to the voltage level VDD. The voltage level .alpha. is an overdrive voltage for the purpose of charging the memory cells at high speed. Namely, a voltage level having a margin of this overdrive voltage level achieves high-speed electric charge when it is applied to the gates of the cell transistors.
In order to generate an internal voltage higher than an externally provided power voltage, a voltage pumping-up circuit is used in semiconductor devices. FIG. 1 is a circuit diagram of an example of a voltage pumping-up circuit used in the related art.
The voltage pumping-up circuit of FIG. 1 includes a first voltage pumping-up circuit 210, a second voltage pumping-up circuit 220, a pumped-up-voltage sensor 230, and an oscillator 231. The first voltage pumping-up circuit 210 includes NMOS transistors 211 and 212, inverters 213 and 214, and a capacitor 215. The second voltage pumping-up circuit 220 includes NMOS transistors 221 and 222, a NAND circuit 223, an inverter 224, and a capacitor 225. Here, the capacitors 215 and 225 are generally embodied by using a gap between the gate and the source/drain of a transistor as a capacitor, and this capacitor has the gate of the transistor as one end and the connected source and drain as the other end.
The first voltage pumping-up circuit 210 operates at all the time, and is used when the semiconductor device is in either one of a standby mode and an active mode. The second voltage pumping-up circuit 220 only operates when the semiconductor device is in the active mode. Switching the second voltage pumping-up circuit 220 depending on the operation mode is controlled by an active signal which is supplied to the NAND circuit 223 of the second voltage pumping-up circuit 220. The active signal becomes HIGH when the active mode is used. The standby mode refers to an operation mode in which the semiconductor device is waiting for a next operation. In the case of semiconductor memory devices such as DRAMs, for example, the standby mode means that a semiconductor device is waiting for next access such as data-read access or data-write access. The active mode means that a semiconductor device is in operation. A semiconductor memory device such as a DRAM in the active mode is responding to access such as data-read access or data-write access.
Operations of the first voltage pumping-up circuit 210 and the second voltage pumping-up circuit 220 are basically the same. A description of operations will be provided below by taking the first voltage pumping-up circuit 210 as an example.
The first voltage pumping-up circuit 210 generates a pumped-up voltage VDH at an output node OUT. When a current is drawn from the output node OUT and consumed in the semiconductor device, the pumped-up voltage VDH is lowered. The pumped-up-voltage sensor 230 monitors the pumped-up voltage VDH, and activates the oscillator 231 when the pumped-up voltage VDH becomes lower than a predetermined threshold voltage. When the oscillator 231 operates, the first voltage pumping-up circuit 210 raises the pumped-up voltage VDH higher than the predetermined threshold voltage.
In detail, when the oscillator 231 has a LOW-level output, the output of the inverter 214 is LOW. A current flows through the NMOS transistor 211 serving as a diode, so that a voltage level at a node A becomes VDD-Vth which is lower than the power voltage VDD by a margin of the threshold voltage level Vth of the NMOS transistor 211. Then, the output of the oscillator 231 is turned into HIGH. In response, the output of the inverter 214 becomes HIGH (voltage VDD). Since the output of the inverter 214 is connected to the node A via the capacitor, the voltage at the node A becomes 2VDD-Vth. At this time, the pumped-up voltage VDH is lower than the voltage at the node A, so that the NMOS transistor 212 is turned on. Charge stored in the capacitor 215 is provided from the node A to the output node OUT, thereby boosting the pumped-up voltage VDH.
As the oscillator 231 switches its output back and forth between HIGH and LOW, the operation described above is repeated again and again, thereby boosting the pumped-up voltage VDH above the predetermined voltage level. When the pumped-up voltage VDH reaches a point higher than the predetermined voltage level, the operation of the oscillator 231 which is controlled by the pumped-up-voltage sensor 230 stops.
In the standby mode, only the first voltage pumping-up circuit 210 operates. Since electric-power consumption is small inside the semiconductor device in the standby mode, the pumped-up voltage VDH shows only a small and gradual change. Because of this, small current-supply power is sufficient for the first voltage pumping-up circuit 210. It is desirable, also, to keep power consumption in the first voltage pumping-up circuit 210 as small as possible. Therefore, the capacitor 215 of the first voltage pumping-up circuit 210 has a relatively small capacitance, and the inverter 214 for driving the capacitor 215 has a relatively small driving power.
The second voltage pumping-up circuit 220 is provided for use in the active mode. Since electric-power consumption is large inside the semiconductor device in the active mode, the pumped-up voltage VDH shows large and rapid changes. Because of this, great current-supply power is necessary for the second voltage pumping-up circuit 220. The capacitor 225 of the second voltage pumping-up circuit 220 needs to have a relatively large capacitance, and the inverter 224 for driving the capacitor 225 needs to have a relatively great driving power. The first voltage pumping-up circuit 210 is also used in the active mode. This is just reflection of a consideration to make the best possible use of the first voltage pumping-up circuit 210 in order to enhance current-supply power in the active mode as much as possible.
The capacitor 215 of the first voltage pumping-up circuit 210 and the capacitor 225 of the second voltage pumping-up circuit 220 have an area ratio of 1:2 to 1:4. A total area size of the capacitors reaches as large as several thousand micro-square meters. The areas of the capacitors 215 and 225, especially, the size of the capacitor 225, occupy a large percentage of a total chip area. The size of the capacitor 225 is one of the main reasons for an increase in the chip size.
The same problems are observed in substrate-voltage generating circuits which generate a voltage level lower than the ground voltage by using a similar circuit configuration as that of the voltage pumping-up circuit.
Accordingly, there is a need for a semiconductor device which can make better use of chip areas by shrinking sizes of capacitors used in voltage pumping-up circuits and substrate-voltage generating circuits.